Altos Design Automation

Altos Design Automation Newswire

Comprehensive Real-Time News Feed for Altos Design Automation.

Results 1 - 20 of 74 in Altos Design Automation

  1. SoC Verifier improves productivity and end product quality.Read the original story

    Friday Dec 19 | ThomasNet

    Intended for use-case, scenario-based software driven system-on-chip verification, Cadence Perspec System Verifier reduces complex test development to days while allowing design teams to reproduce, find, and fix complex bugs. Graphical specification of system-level verification scenarios and definition of SoC topology and actions automates system-level, coverage-driven test development using constraint solving technology.

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  2. Globalfoundries and Cadence deliver first SoC enablement solution...Read the original story

    Thursday Dec 18 | DigiTimes

    Cadence Design Systems and Globalfoundries have jointly announced the delivery of quad-core silicon built around the ARM Cortex-A17 processor implemented using Globlfoundries' 28nm super low-power process with high-k metal gate technology. Globalfoundries utilized Cadence tools exclusively to achieve 2.0GHz processor performance at typical operating conditions, which matched pre-silicon design performance predicted by Cadence Tempus Timing Signoff Solution analysis.

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  3. So Much To Do, So Little TimeRead the original story w/Photo

    Thursday Dec 18 | EETimes

    Willy Wonka may agree: "So much time and so little to do. Wait a minute. Strike that.

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  4. Fujitsu Kansai-Chubu Net-Tech Shortens Design Time by 40 Percent on...Read the original story

    Wednesday Dec 17 | PressReleasePoint

    Cadence Design Systems, Inc. today announced that Fujitsu Kansai-Chubu Net-Tech Limited utilized the Cadence C-to-Silicon Compiler to shorten turnaround time by 40 percent compared to its traditional RTL process for a complex 100G transport system design. KCN used the SystemC-based design approach for the transport system pipelines, reducing code size by more than half, and used the C-to-Silicon Compiler high-level synthesis for quick iterations to tune the functional specification and generate the optimized RTL implementation.

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  5. Cadence Receives Commendation from City of San JoseRead the original story

    Thursday Dec 11 | PressReleasePoint

    One of 25 companies recognized for the most growth and jobs in the capital of Silicon Valley SAN JOSE, Calif., 11 Dec 2014 Cadence Design Systems, Inc. today announced that San Jose Mayor Chuck Reed and the San Jose City Council have recognized the company as one of the 25 industry-driving companies generating the most growth and jobs in the city. As a key contributor to advancing the state of system design, Cadence continues to invest in innovation to enable the creation of the advanced mobile, consumer, automotive and other devices and systems that are rapidly changing our world.

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  6. Cadence Perspec System Verifier Delivers Up to 10X Productivity...Read the original story

    Thursday Dec 11 | PressReleasePoint

    Improves SoC quality by accelerating the development of complex software-driven tests and integrated debug to reproduce, find and fix complex SoC-level bugs Cadence Design Systems, Inc. , today announced the CadenceA Perspec a System Verifier platform for use-case scenario-based software-driven system-on-chip verification. Using an intuitive graphical specification of system-level verification scenarios and a definition of the SoC topology and actions, this new verification solution automates system-level coverage-driven test development using constraint-solving technology, delivering up to 10X productivity improvement in SoC verification versus typical manual test development.

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  7. Cadence Receives Commendation from City of San JoseRead the original story

    Thursday Dec 11 | Freshnews

    Cadence Design Systems, Inc. today announced that San Jose Mayor Chuck Reed and the San Jose City Council have recognized the company as one of the 25 industry-driving companies generating the most growth and jobs in the city. As a key contributor to advancing the state of system design, Cadence continues to invest in innovation to enable the creation of the advanced mobile, consumer, automotive and other devices and systems that are rapidly changing our world.

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  8. Chip verification moves to system-levelRead the original story w/Photo

    Thursday Dec 11 | Electronics Weekly

    Cadence Design Systems announced the Cadence Perspec System Verifier platform for use-case scenario-based software-driven system-on-chip verification. "Design has moved from constraint driven verification to metric driven verification and now it moves to software driven verification based on top-down system design scenarios," said Frank Schirrmeister, director of marketing in the System & Verification Group at Cadence.

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  9. Media Alert: Cadence to Showcase Audio and Video IP at CES 2015Read the original story

    Wednesday Dec 10 | PressReleasePoint

    SAN JOSE, Calif., December 10, 2014- Cadence Design Systems, Inc. today announced plans to showcase its intellectual property , which is enabling the next-generation of consumer devices, at the Consumer Electronics Show from January 6-9, 2015 at the Las Vegas Convention Center. Cadence will host meetings with leading semiconductor and systems companies and showcase the following demonstrations of its TensilicaA audio and imaging DSPs and CadenceA MIPI design IP: This demo shows how an ordinary pair of headphones can be transformed into an impressive personal surround sound system.

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  10. Media Alert: Cadence to Host Front-End Design SummitRead the original story

    Wednesday Dec 3 | Digital Post Production

    Attendees also have opportunities to network with fellow logic designers and experts and to speak directly with Cadence R&D product team experts. The summit agenda is comprised of keynote addresses and a variety of user presentations on topics including: About Cadence Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics.

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  11. HiSilicon expands adoption of Cadence tools and IP for advanced-node FinFET designsRead the original story

    Monday Dec 1 | DigiTimes

    Cadence Design Systems announced on December 1 that HiSilicon Technologies has signed an agreement to significantly expand its use of the Cadence digital and custom/analog flows for 16nm FinFET designs, and to collaborate on the design flow for 10nm and 7nm nodes. HiSilicon has also broadly adopted Cadence digital and custom/analog verification solutions, and has licensed Cadence DDR IP and the Cadence 3D-IC solution to deploy multiple heterogeneous dies in a single package on a silicon interposer substrate.

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  12. Global PCB Design Software Market 2014-2018Read the original story

    Tuesday Nov 25 | Sys-Con Media

    A PCB design software is a subpart of an electronic design automation tool. It is an open-source and free of cost software used to design the layout of a PCB.

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  13. Uniquify Appoints Dale Olstinske Senior Vice President of Worldwide SalesRead the original story

    Nov 13, 2014 | Market Wire

    Uniquify , a leading high-performance semiconductor intellectual property and system-on-chip integration and manufacturing services supplier, today named Dale Olstinske to the position of senior vice president of worldwide sales. Olstinske, a 35-year semiconductor industry veteran, has served in roles of increasing responsibility with leading electronic design automation , IP and semiconductor companies, including Denali Software , LogicVision , LSI Logic and Intel.

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  14. Uniquify Appoints Dale Olstinske Senior Vice President of Worldwide SalesRead the original story

    Nov 13, 2014 | Design And Reuse

    SAN JOSE, CALIF. –– November 13, 2014 –– Uniquify , a leading high-performance semiconductor intellectual property and system-on-chip integration and manufacturing services supplier, today named Dale Olstinske to the position of senior vice president of worldwide sales.

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  15. Cadence Design Systems Inc (CDNS): Glenview Capital Raises Stake in a Company with Good ProspectsRead the original story w/Photo

    Nov 12, 2014 | Insider Monkey

    Larry Robbins ' Glenview Capital has boosted its exposure to Cadence Design Systems Inc , as disclosed in a new filing with the Securities and Exchange Commission. Glenview currently owns 17.65 million shares of the company, the passive stake amassing slightly over 6% of the company.

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  16. Sonics, Inc. Appoints Randy Smith as Vice President of MarketingRead the original story

    Nov 12, 2014 | Design And Reuse

    Milpitas, Calif. – November 12, 2014 – Sonics, Inc. , the world's foremost supplier of on-chip network technologies and services, today announced that Randy Smith has joined the company as its Vice President of Marketing.

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  17. Cadence Design Systems Professorship Endowed at Stanford UniversityRead the original story

    Nov 12, 2014 | PressReleasePoint

    Cadence Design Systems, Inc. , a leader in global electronic design innovation, today announced the endowment of the Cadence Design Systems Professorship at Stanford University in the School of Engineering and the appointment of Dr. Kunle Olukotun as the first Cadence Professor. Dr. Olukotun is a Professor of Electrical Engineering and Computer Science and is the director of the Pervasive Parallelism Lab at Stanford University.

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  18. Case Study: Finding Customer-Critical Bugs with UndoDB for LinuxRead the original story

    Nov 11, 2014 | InformationWeek

    Overview: Developers of complex C++ code for memory-intensive software applications need greater insight into their code during debug. The situation intensifies when it's a customer-critical bug and the data needed can't leave the customer's site.

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  19. Media Alert: Cadence to Host Low-Power Technology SummitRead the original story

    Nov 3, 2014 | Freshnews

    Cadence Design Systems, Inc. , a leader in global electronic design innovation, today announced plans to host the Low-Power Technology Summit on November 18, 2014, at its headquarters in San Jose, Calif. WHAT: Attendees of this free, day-long event can learn from experts at Cadence and other leading companies about the latest trends and methodologies for tackling low-power design challenges, from functional verification to physical implementation and signoff.

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  20. Media Alert: Cadence to Host Jasper User Group Conference 2014Read the original story

    Oct 30, 2014 | Digital Post Production

    The conference agenda includes a variety of user presentations on core technologies, applications and flows, including: , executive vice president, Worldwide Field Operations and System & Verification Group and Oz Levia, vice president, R&D, as well as a greeting from Lip-Bu Tan, president and CEO To register for the Jasper User Group Conference and for additional information about the event, including the complete agenda, visit www.cadence.com/news/JUGC2014 . Also, bookmark the following site to view real-time highlights of the two morning keynotes: Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics.

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